Ebook Introduction to Logic Circuits & Logic Design with Verilog

Ebook Introduction to Logic Circuits & Logic Design with Verilog

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Introduction to Logic Circuits & Logic Design with Verilog

Ebook Introduction to Logic Circuits & Logic Design with Verilog

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From the Back Cover

This textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning Goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome. ·        Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation;·        Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book;·        Includes more than 600 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.

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About the Author

Brock LaMeres joined the Montana State ECE faculty in July of 2006. He received his Ph.D. in electrical engineering from the University of Colorado, Boulder in December of 2005, his MSEE from the University of Colorado, Colorado Springs in May of 2001, and his BSEE from Montana State University, Bozeman in December of 1998. LaMeres teaches and conducts research in the area of digital systems with particular emphasis on exploiting reprogrammable fabrics to deliver more effective computer systems. LaMeres is also studying how engineering education can be improved using innovative e-learning environments. LaMeres has published over 70 manuscripts and 3 textbooks in the area of high speed digital systems. LaMeres has also been granted 13 US patents in the area of digital signal propagation. LaMeres is a Senior Member of IEEE and a Registered Professional Engineer in the States of Montana and Colorado. Dr. LaMeres is a member of AESS, ASEE and serves as the faculty advisor of the student branch of IEEE at MSU. Prior to coming to MSU, Dr. LaMeres worked as an R&D engineer for Agilent Technologies in Colorado Springs, CO from 1999 to 2006. LaMeres was a hardware design engineer in the Logic Analysis R&D lab. He designed acquisition hardware for the 16910/11/12 and 16950 Logic Analyzer systems in addition to developing a variety of probing solutions.

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Product details

Hardcover: 459 pages

Publisher: Springer; 1st ed. 2017 edition (May 16, 2017)

Language: English

ISBN-10: 3319538829

ISBN-13: 978-3319538822

Product Dimensions:

7 x 1.2 x 10 inches

Shipping Weight: 2.3 pounds (View shipping rates and policies)

Average Customer Review:

4.2 out of 5 stars

3 customer reviews

Amazon Best Sellers Rank:

#286,320 in Books (See Top 100 in Books)

This book lays out the concepts and uses of VHDL better than any other textbook of its kind. It's easy to follow and one of the rare textbooks that are easy to read. It's not just page after page of dry technical reading. If you're looking for a book to learn VHDL this is the one to buy.

Chapter 1 to Chapter 3: Lot of emphasis is given by the authors to cover the basic fundamentals required for the design. Chapter 1 to 4 has the many concept check examples and exercises with meaningful questions. But still it lacks the practicality and clarity of explanation. The application of the logic gates and the practical scenarios need to be discussed in more details during the next edition. The current industrial standard is low power designs and voltage levels are less than 5 Volt and even 3.3, 2.8 and 1.5 volt. This need to be mentioned in the section 3.3 with the noise margin and driving loads. Effectively for the undergraduate courses the book can serve the good purpose to understand the digital terminology and logic circuit design.Chapter 4 discusses about the combinational logic design and author has covered the concepts in detail with the minimization techniques. For the further improvement in this book, authors can think about adding the area optimization techniques, the parallel logic and concurrent logic and the design performance. Even for better readability the medium complex examples need to be discussed in this chapter.Chapter 5 has information about the basic of VHDL and with reference to the initial chapters the emphasis is given to implement the logic structure. This chapter has VHDL codes for some functionality. Still it lacks the basic difference between structural, behavior and RTL description. For small density logic the approach explained by the authors is good but as design complexity increases the approach is not suitable. So during the next edition it is better to add the different types of VHDL abstractions with the examples.Chapter 6 has VHDL codes and it lacks the naming conventions followed in the practical world. Even the sequence should be MUX, Demux, Advantages and disadvantages with VHDL implementations and then use of decoders, encoders. On page 183-184 there is functional issue in the design of encoder and author should correct this. The encoder all inputs are logic “0000” then the output is also “00” in the design. So according to the given VHDL description output is “00” for input “0001” and for when others condition that may be “0000”. Under such circumstances it is essential to add the status flag functionality to generate flag output as logic ‘1’ when all inputs of encoder are logic ‘0’.Chapter 7 page 255 has the tmargin delay but the cause of the delay is not explained properly. The Process, Voltage Temperature variation or On-chip-variation need to be explained with some practical example then the timing diagram and the maximum frequency calculation section can be more meaningful and readers will be able to correlate the same with the practical scenarios.Chapter 8: VHDL constructs like if-then-else has potential problem in the description. Please check page 271 code first “Due to missing ‘else’ clause it infers the latch. But author has described this as combinational logic. Unnecessary unintentional latches are inferred in the design. In this chapter most of the example lacks the naming conventions. Even the quality of example need to be improved, even there is need to add few practical applications.Chapter 9 has sequential logic VHDL description; still it lacks the difference between the behavior and RTL. The RTL coding should be improved with the meaningful naming conventions and with some additional complex functionality.Chapter 10 and 11 has only theoretical information about the memories and programmable logic and this can be improved with some practical scenarios and with few examples and realization of VHDL into synthesis.Chapter 12 and 13 covers VHDL coding of adders to processor but still the linking of the concept to implement the design is lacking in this. These two chapters can be improved by adding other concepts related with RTL design, synthesis and design implementation using FPGA or ASIC.Overall the book covers many concepts but lacks the practical scenarios and even it lacks the complex example design, synthesis and implementation. But this book is good for beginners and students to understand the digital concepts and basics of VHDL programming.

Excellent textbook!

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Introduction to Logic Circuits & Logic Design with Verilog PDF

Introduction to Logic Circuits & Logic Design with Verilog PDF

Introduction to Logic Circuits & Logic Design with Verilog PDF